This invention relates to methods for making semiconductor devices, and more particularly to methods for making a MESFET.
The history of integrated circuit design has been characterized by a trend to increasing circuit densities. Various technologies have been developed to stimulate this trend. For example, TTL (transistor-transistor logic) was standard in digital equipment for a long time, but has given way in many areas to N-channel MOS logic circuits because of their superiority in speed-power product, packing density, and ease of device fabrication. The MESFET is a device that offers many of the advantages of N-MOS technology witout some of its disadvantages. Its application and microprocessor circuits will be primarily in digital logic such as memory and microprocessor circuits, as was the transistor of TTL.
One of the problems with N-channel MOS devices is that when they are scaled down in size, the gate oxide thickness must be scaled down accordingly. This creates a problem in that it is very difficult to fabricate thin silicon oxides that are free from "pinholes". A "pinhole" in a gate oxide will create a gate-to-channel short and, therefore, a device failure. This problem can be very serious, as there can be thousands of gate oxide areas on a typical N-channel MOS memory or microprocessor.
In U.S. Pat. No. 4,202,003, Darley et al disclose a MESFET device which solves many of the problems with N-channel MOS integrated circuits. However, with the continuing trend to higher packing densities, the device disclosed in the aforementioned patent will not be suitable for future design needs. Alignment tolerances which restrict chip size must be allowed for in device design, as they also adversely affect device performance by increasing source-to-drain series resistance.
It is a principal object of this invention to provide an improved method for making a MESFET device which is useful in the design of high density digital logic circuits. Another object is to provide a more compact MESFET device, with low source-to-drain series resistance.